π FIT1047: Introduction to Computer Systems, Networks and Security
Map of Content
Index for FIT1047 (Malaysia campus). Hand-execution unit: number conversions, logic circuits, MARIE assembly traces are the assessed skills β every applied note carries a write-from-blank element.
π Assessment Map
- Assignment 1 (15%) β Foundations: Binary Number System (W1) + Boolean Logic Circuit (W2).
- Assignment 2 (30%) β Programming Interview: Assembly Programming (W3β4), Computer Architecture (W3β4), Motherboard & Boot (W5), OS (W5).
- Assignment 3 (30%) β Networks
- Assignment 4 (25%) β Security
- LO1 (W1β2): number representations + Boolean algebra β logic circuits Β· LO2: hardware/software architectures Β· LO3: MARIE assembly Β· LO4: OS functions.
π§° Unit Cheatsheet
- π FIT1047 Unit Cheatsheet βsystems β networks β security in one re-read
π Knowledge Index
Week 1 β Data Representation (Foundations of Computing)
- Computer Fundamentals (Bits, Bytes, Words) β Parent Framework: FIT1047_MOC
- Number Systems (Binary and Hexadecimal) β Parent Framework: Computer Fundamentals (Bits, Bytes, Words)
- Signed Integer Representation (Twoβs Complement) β Parent Framework: Number Systems (Binary and Hexadecimal)
- Floating Point Numbers (IEEE 754) β Parent Framework: Number Systems (Binary and Hexadecimal)
- Text Encoding (ASCII and Unicode) β Parent Framework: Computer Fundamentals (Bits, Bytes, Words)
- Transistors and Logic Gates β Parent Framework: Computer Fundamentals (Bits, Bytes, Words)
Week 2 β Boolean Logic & Circuits
- Boolean Algebra Laws β Parent Framework: Logical Connectives (Smart Merged: FIT1058 logic + FIT1047 circuit notation, precedence, why-simplify)
- Sum-of-Products (Functions to Circuits) β Parent Framework: Boolean Algebra Laws
- Karnaugh Maps β Parent Framework: Sum-of-Products (Functions to Circuits)
- Transistors and Logic Gates β Parent Framework: Computer Fundamentals (Bits, Bytes, Words) (extended in Week 2: NAND + universal gates)
Week 3 β Circuits with Memory, Architecture & MARIE
- Combinational Circuits (Adders, Decoders, MUX, ALU) β Parent Framework: Transistors and Logic Gates
- Sequential Circuits (Latches, Flip-Flops, Registers) β Parent Framework: Combinational Circuits (Adders, Decoders, MUX, ALU)
- Von Neumann Architecture and Programs β Parent Framework: Computer Fundamentals (Bits, Bytes, Words)
- Fetch-Decode-Execute and RTL (Control) β Parent Framework: Von Neumann Architecture and Programs
- MARIE Assembly (Instruction Set and Patterns) β Parent Framework: Von Neumann Architecture and Programs
Week 4 β Indirect Addressing, Subroutines & Memory
- MARIE Assembly (Instruction Set and Patterns) β Parent Framework: Von Neumann Architecture and Programs (extended in Week 4: LoadI/StoreI/AddI/JnS/JumpI + Adr/HEX directives)
- MARIE Patterns (Indirect Addressing, Arrays, Subroutines) β Parent Framework: MARIE Assembly (Instruction Set and Patterns)
- Memory and the Memory Hierarchy β Parent Framework: Von Neumann Architecture and Programs
Week 5 β Motherboard, I/O, Boot & Operating Systems (A2 material complete)
- Motherboard and IO Interfaces β Parent Framework: Von Neumann Architecture and Programs
- CPU-IO Communication (Memory-Mapped, Polling, Interrupts, DMA) β Parent Framework: Motherboard and IO Interfaces
- The Boot Process β Parent Framework: Motherboard and IO Interfaces
- Operating Systems and Multi-Processing β Parent Framework: Von Neumann Architecture and Programs
- Virtual Memory (MMU and Paging) β Parent Framework: Operating Systems and Multi-Processing
Week 6 β Networks I: Layers & Application Protocols (LO5β6 begin)
- Computer Networks (Components and Types) β Parent Framework: FIT1047_MOC
- Internet Model (Layers, Protocols, Encapsulation) β Parent Framework: Computer Networks (Components and Types)
- Application Architectures (Client-Server Tiers) β Parent Framework: Computer Networks (Components and Types)
- World Wide Web (HTTP and HTML) β Parent Framework: Internet Model (Layers, Protocols, Encapsulation)
- Electronic Mail (SMTP, POP, IMAP, MIME) β Parent Framework: Internet Model (Layers, Protocols, Encapsulation)
Week 7 β Networks II: The Four Lower Layers & Addressing
- Physical and Data Link Layers (Signals, Ethernet, CSMA-CD) β Parent Framework: Internet Model (Layers, Protocols, Encapsulation)
- Network Addresses (URL, Port, IP, MAC) β Parent Framework: Internet Model (Layers, Protocols, Encapsulation)
- Address Resolution (DNS and ARP) β Parent Framework: Network Addresses (URL, Port, IP, MAC)
- Network Layer (Routing and Routing Tables) β Parent Framework: Internet Model (Layers, Protocols, Encapsulation)
- Transport Layer (TCP and UDP) β Parent Framework: Internet Model (Layers, Protocols, Encapsulation)
Week 8 β Networks III: Switched Ethernet, WiFi & Organisational Networks
- Switched Ethernet (Switches, Forwarding, LAN Design) β Parent Framework: Physical and Data Link Layers (Signals, Ethernet, CSMA-CD)
- WiFi (802.11, CSMA-CA, Topologies) β Parent Framework: Physical and Data Link Layers (Signals, Ethernet, CSMA-CD)
- WiFi Security (WEP, WPA2) β Parent Framework: WiFi (802.11, CSMA-CA, Topologies) (seeds the security half)
- LAN, Backbone, MAN, WAN (Organisational Networks) β Parent Framework: Computer Networks (Components and Types)
Week 9 β The Internet: Structure, Access, Delivery & Society
- Internet Structure and Governance β Parent Framework: Computer Networks (Components and Types) (AS, BGP, IXP, peering/transit, governance)
- Internet Access Technologies β Parent Framework: Internet Structure and Governance
- CDNs, Load Balancing and Caching β Parent Framework: Internet Structure and Governance
- Internet of Things (IoT) β Parent Framework: Internet Structure and Governance
- Net Neutrality and Internet Policy β Parent Framework: Internet Structure and Governance
- (Week 7 recap in the workshop β line-coding/modulation β is already covered by Physical and Data Link Layers (Signals, Ethernet, CSMA-CD); interior routing (RIP/OSPF) by Network Layer (Routing and Routing Tables).)
Week 10 β Security I: Cryptography & Secure-Channel Protocols (LO7)
- Information Security and Cryptography β Parent Framework: FIT1047_MOC (hub: security goals + three algorithm families)
- Symmetric Cryptography β Parent Framework: Information Security and Cryptography
- Public Key Cryptography β Parent Framework: Information Security and Cryptography
- Cryptographic Hash Functions β Parent Framework: Information Security and Cryptography
- Key Establishment and Diffie-Hellman β Parent Framework: Information Security and Cryptography
- Authentication, Certificates and PKI β Parent Framework: Information Security and Cryptography
- Secure Channels - TLS and VPNs β Parent Framework: Information Security and Cryptography
- (Cross-links to FIT1058 number theory: Diffie-Hellman Key Agreement, Cryptosystem, One-Way Function, Modular Exponentiation, Euler Totient Function, Prime Number, Primitive Root β the maths behind RSA/DH lives there, not duplicated here.)
Week 11 β Security II: Authentication, Access Control & Network Defence (LO7)
- User Authentication and Passwords β Parent Framework: Information Security and Cryptography
- Multi-Factor Authentication and Biometrics β Parent Framework: User Authentication and Passwords
- Access Control β Parent Framework: Information Security and Cryptography
- Firewalls and Packet Filtering β Parent Framework: Information Security and Cryptography
- IDS, IPS and Next-Generation Firewalls β Parent Framework: Firewalls and Packet Filtering
- (Cross-links: salted-hash storage β Cryptographic Hash Functions; login in kernel mode β Operating Systems and Multi-Processing; NGF TLS-proxy breaks end-to-end β Secure Channels - TLS and VPNs.)
Week 12 β Security III: Threats, Vulnerabilities, Risk & Privacy (LO7)
- Malware and Attack Types β Parent Framework: Information Security and Cryptography
- Software Vulnerabilities (Injection, XSS, Buffer Overflow) β Parent Framework: Information Security and Cryptography
- Cybersecurity Case Studies β Parent Framework: Information Security and Cryptography
- Cybersecurity Risk Management β Parent Framework: Information Security and Cryptography
- Privacy and Data Protection (FIT1047) β Parent Framework: Information Security and Cryptography
- (Cross-links: botnet/DDoS β Internet of Things (IoT); buffer overflow return address β MARIE Patterns (Indirect Addressing, Arrays, Subroutines); SQL injection β SQL SELECT and WHERE; privacy β Privacy, Confidentiality, and Security, Personal Data and Privacy in Database Design.)
π§ Suggested Reading Order
(read leftβright within each week Β· bold = assessment-critical hand skill)
- W1 β data representation: Computer Fundamentals (Bits, Bytes, Words) β Number Systems (Binary and Hexadecimal) (A1) β Signed Integer Representation (Twoβs Complement) β Floating Point Numbers (IEEE 754) β Text Encoding (ASCII and Unicode) β Transistors and Logic Gates
- W2 β logic β circuits: Boolean Algebra Laws β Sum-of-Products (Functions to Circuits) β Karnaugh Maps (A1 simplification) β Transistors and Logic Gates Β§Universality
- W3 β architecture & MARIE: Combinational Circuits (Adders, Decoders, MUX, ALU) β Sequential Circuits (Latches, Flip-Flops, Registers) β Von Neumann Architecture and Programs β Fetch-Decode-Execute and RTL (Control) (A2 trace) β MARIE Assembly (Instruction Set and Patterns) (A2 writing)
- W4 β pointers & memory: MARIE Patterns (Indirect Addressing, Arrays, Subroutines) (A2 core) β Memory and the Memory Hierarchy
- W5 β board, boot, OS: Motherboard and IO Interfaces β CPU-IO Communication (Memory-Mapped, Polling, Interrupts, DMA) β The Boot Process (A2) β Operating Systems and Multi-Processing (A2 + LO4) β Virtual Memory (MMU and Paging)
- W6 β network stack & apps: Computer Networks (Components and Types) β Internet Model (Layers, Protocols, Encapsulation) (the networks framework) β Application Architectures (Client-Server Tiers) β World Wide Web (HTTP and HTML) β Electronic Mail (SMTP, POP, IMAP, MIME)
- W7 β lower layers & addressing: Physical and Data Link Layers (Signals, Ethernet, CSMA-CD) β Network Addresses (URL, Port, IP, MAC) β Address Resolution (DNS and ARP) β Network Layer (Routing and Routing Tables) β Transport Layer (TCP and UDP)
- W8 β LANs & WiFi: Switched Ethernet (Switches, Forwarding, LAN Design) β WiFi (802.11, CSMA-CA, Topologies) β WiFi Security (WEP, WPA2) β LAN, Backbone, MAN, WAN (Organisational Networks)
- W9 β the Internet at scale: Internet Structure and Governance β Internet Access Technologies β CDNs, Load Balancing and Caching β Internet of Things (IoT) β Net Neutrality and Internet Policy
- W10 β cryptography: Information Security and Cryptography (goalβmechanism spine) β Symmetric Cryptography β Public Key Cryptography β Cryptographic Hash Functions β Key Establishment and Diffie-Hellman β Authentication, Certificates and PKI β Secure Channels - TLS and VPNs
- W11 β auth & defence: User Authentication and Passwords β Multi-Factor Authentication and Biometrics β Access Control β Firewalls and Packet Filtering β IDS, IPS and Next-Generation Firewalls
- W12 β attacks, risk, privacy: Malware and Attack Types β Software Vulnerabilities (Injection, XSS, Buffer Overflow) β Cybersecurity Case Studies β Cybersecurity Risk Management β Privacy and Data Protection (FIT1047)
π― Learning Outcomes (key skills per week)
- W1 β
- convert decβbinβhex + add binary by hand
- negate via flip+1, range + overflow by sign rule
- normalise IEEE 754 + explain why is inexact
- decode ASCII hex, Unicode vs UTF-8
- switch β transistor β gate story
- W2 β
- build truth tables (precedence NOT>AND>OR)
- apply the Boolean laws to simplify/prove equivalence
- truth table β SOP β circuit
- minimise with a K-map (Gray code, maximal groups, wrap-around)
- NAND/NOR universality
- W3 β
- explain adders/decoder/MUX + compute-all-MUX-select ALU
- SR latch (hold row, forbidden ), D flip-flop, registers
- Von Neumann + stored program
- hand-trace fetch-decode-execute in RTL
- write MARIE with SkipCond+Jump idioms
- W4 β
- direct vs indirect addressing ( vs )
- pointer-walk array loops, counter vs sentinel termination
- JnS/JumpI subroutines (
HEX 0slot, no recursion) - capacity from address width Γ addressability
- cache vs swap directions
- W5 β
- board components + interface trade-offs
- memory-mapped vs port I/O
- polling vs interrupts vs DMA
- the 12-step boot chain, BIOS vs UEFI
- Running/Ready/Blocked trace, user/kernel mode, system calls
- MMU isolation + page faults
- W6 β
- client/server/switch/router + reach ladder
- transfer time with
- five layers + PDUs, protocol vs interface
- encapsulation both directions
- label a raw HTTP session
- emailβs three hops, POP vs IMAP, MIME
- W7 β
- digital encodings vs modulation
- CSMA/CDβs three parts
- one address per layer
- subnet arithmetic
- DNS (iterative vs recursive) + ARP broadcast
- per-hop routing, RIP vs OSPF
- TCP seq/ack lifecycle vs UDP
- W8 β
- switch learning/flood-when-unknown/store-and-forward
- switch vs hub vs router
- WiFi channels (), CSMA/CA + hidden node, BSS/ESS
- rank open/WEP/WPA2-PSK/Enterprise
- owned LAN/backbone vs the leased WAN triangle
- W9 β
- AS + BGP, interior vs exterior routing
- peering vs transit, IXPs, tiers
- access technologies (ADSL/DSLAM, NBN/GPON, 4G/5G)
- load balancing vs caching vs CDN
- IoT security + Mirai/Dyn
- net-neutrality trade-offs
- W10 β
- match security goal β mechanism
- AES + its three weaknesses ( keys)
- RSA ops + key-length pairs
- hash properties + MAC-not-bare-hash
- DH exchange + discrete log, no authentication
- certificates/CA/revocation
- TLS + VPN endpoint limits
- W11 β
- three authentication factors
- salted-hash password storage
- MFA + biometric/token/app trade-offs, SIM swap
- ACL scaling wall β Kerberos/SSO
- firewall = filter-not-block + its limits
- IDS vs IPS, NGF TLS-proxy cost
- W12 β
- attack/malware taxonomy (virus vs worm vs trojan)
- four vulnerability classes + shared root cause (unchecked input)
- case-study lesson: exposure + insecure defaults
- residual risk + NIST RMF Β· profiling, PETs, data minimisation